"8 ( ARM Versatile PBarm,versatile-pb ,aliases=/amba/uart@101f1000E/amba/uart@101f2000M/amba/uart@101f3000U/i2c@10002000chosenZ/amba/uart@101f1000memoryfmemoryrxtal24mhz@24Mv fixed-clockn6bridgeti,ths8134bti,ths8134 ports port@0rendpoint port@1rendpointvgavga-connectorportendpointcore-module@10000000,arm,core-module-versatilesysconsimple-mfdrled@08.0register-bit-led versatile:0 heartbeatonled@08.1register-bit-led versatile:1mmc0offled@08.2register-bit-led versatile:2cpu0offled@08.3register-bit-led versatile:3offled@08.4register-bit-led versatile:4offled@08.5register-bit-led  versatile:5offled@08.6register-bit-led@ versatile:6offled@08.7register-bit-led versatile:7offcm_aux_osc@24Mvarm,versatile-cm-auxosctimclk@1Mvfixed-factor-clock pclk@24Mvfixed-factor-clockflash@34000000arm,versatile-flashcfi-flashr4partitionsarm,arm-firmware-suitei2c@10002000 arm,versatile-i2cr rtc@68dallas,ds1338rhnet@10010000smsc,lan91c111rlcd@10008000arm,versatile-lcdramba simple-bus intc@10140000arm,versatile-vic/r@Kintc@10003000arm,versatile-sic/r0,@K dma@10130000arm,pl081arm,primecellr Vapb_pclkuart@101f1000arm,pl011arm,primecellr Vuartclkapb_pclkuart@101f2000arm,pl011arm,primecellr  Vuartclkapb_pclkuart@101f3000arm,pl011arm,primecellr0Vuartclkapb_pclksmc@10100000arm,primecellr Vapb_pclkmpmc@10110000arm,primecellr Vapb_pclkdisplay@10120000arm,pl110arm,primecellrVclcdclkapb_pclkb7port@0 endpoint@0r w endpoint@1r  wsctl@101e0000arm,primecellr Vapb_pclkwatchdog@101e1000arm,primecellr Vapb_pclktimer@101e2000arm,sp804arm,primecellr  Vtimer0timer1apb_pclktimer@101e3000arm,sp804arm,primecellr0 Vtimer0timer1apb_pclkgpio@101e4000arm,pl061arm,primecellr@/ Vapb_pclkgpio@101e5000arm,pl061arm,primecellrP/ Vapb_pclkrtc@101e8000arm,pl030arm,primecellr  Vapb_pclksci@101f0000arm,primecellr Vapb_pclkspi@101f4000arm,pl022arm,primecellr@ VSSPCLKapb_pclkfpgaarm,versatile-fpgasimple-bus  sysreg@0'arm,versatile-sysregsysconsimple-mfdrdisplay@0arm,versatile-tft-panelportendpoint aaci@4000arm,primecellr@ Vapb_pclkmmc@5000arm,pl180arm,primecellrP  Vmclkapb_pclkkmi@6000arm,pl050arm,primecellr`, VKMIREFCLKapb_pclkkmi@7000arm,pl050arm,primecellrp, VKMIREFCLKapb_pclkuart@9000arm,pl011arm,primecellr, Vuartclkapb_pclksci@a000arm,primecellr,  Vapb_pclkmmc@b000arm,pl180arm,primecellr, Vmclkapb_pclkgpio@101e6000arm,pl061arm,primecellr`/ Vapb_pclkgpio@101e7000arm,pl061arm,primecellrp / Vapb_pclkpci@10001000arm,versatile-pcifpcirAB /HCPPB``                 modelcompatible#address-cells#size-cellsinterrupt-parentserial0serial1serial2i2c0stdout-pathdevice_typereg#clock-cellsclock-frequencyphandleremote-endpointoffsetmasklabellinux,default-triggerdefault-stateclocksclock-divclock-multbank-widthinterruptsrangesinterrupt-controller#interrupt-cellsclear-maskvalid-maskclock-namesmax-memory-bandwidtharm,pl11x,tft-r0g0b0-padsgpio-controller#gpio-cellsinterrupts-extendedbus-rangeinterrupt-map-maskinterrupt-map